Saelig公司的WIZ200Web网络服务器模块采用Atmel公司的MCU Atmega128,内部具有4KB RAM,外接32KB RAM, 内部的ROM为128KB,外接ROM为512KB,LAN为WIZnet W5300 Hardwired TCP/IP,功耗仅为170mA.可以作为HTTP服务器运作.采用硬连接芯片W5300以保证系统的稳定性和可靠性,可提供配置工具编程.便于控制和配置,支持10/100Mbps以太网.并于RoHS兼容.本文介绍了Atmega128的主要特性,方框图以及网络服务器WIZ200Web的主要功能,特性和指标,评估板的电路图.
WIZnet Embedded Web Server Module (WIZ200Web)
The ATmega128 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega128 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
The ATmega128 provides the following features: 128K bytes of In-System Programmable Flash with Read-While-Write capabilities, 4K bytes EEPROM, 4K bytes SRAM, 53 general purpose I/O lines, 32 general purpose working registers, Real Time Counter (RTC), four flexible Timer/Counters with compare modes and PWM, 2 USARTs, a byte oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional differential input stage with programmable gain, programmable Watchdog Timer with Internal Oscillator, an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the On-chip Debug system and programming and six software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning.
The Power-down mode saves the register contents but freezes the Oscillator, disabling all
other chip functions until the next interrupt or Hardware Reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low power consumption. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run.
The device is manufactured using Atmel’s high-density nonvolatile memory technology. The Onchip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program running on the AVR core. The boot program can use any interface to download the application program in the application Flash memory. Software in the Boot Flash section will continue to run while the Application Flash section is updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel ATmega128 is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications.
The ATmega128 AVR is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.
The ATmega128 is a highly complex microcontroller where the number of I/O locations supersedes the 64 I/O locations reserved in the AVR instruction set. To ensure backward compatibility with the ATmega103, all I/O locations present in ATmega103 have the same location in ATmega128. Most additional I/O locations are added in an Extended I/O space starting from $60 to $FF, (i.e., in the ATmega103 internal RAM space). These locations can be reached by using LD/LDS/LDD and ST/STS/STD instructions only, not by using IN and OUT instructions. The relocation of the internal RAM space may still be a problem for ATmega103 users. Also, the increased number of interrupt vectors might be a problem if the code uses absolute addresses.
To solve these problems, an ATmega103 compatibility mode can be selected by programming the fuse M103C. In this mode, none of the functions in the Extended I/O space are in use, so the internal RAM is located as in ATmega103. Also, the Extended Interrupt vectors are removed.
The ATmega128 is 100% pin compatible with ATmega103, and can replace the ATmega103 on current Printed Circuit Boards. The application note “Replacing ATmega103 by ATmega128” describes what the user should be aware of replacing the ATmega103 by an ATmega128.
ATmega128主要特性:
High-performance, Low-power AVR 8-bit Microcontroller
Advanced RISC Architecture
133 Powerful Instructions–Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers + Peripheral Control Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
128K Bytes of In-System Self-programmable Flash program memory
4K Bytes EEPROM
4K Bytes Internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data retention: 20 years at 85℃/100 years at 25℃
Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Up to 64K Bytes Optional External Memory Space
Programming Lock for Software Security
SPI Interface for In-System Programming
JTAG (IEEE std. 1149.1 Compliant) Interface
Boundary-scan Capabilities According to the JTAG Standard
Extensive On-chip Debug Support
Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode and Capture Mode
Real Time Counter with Separate Oscillator
Two 8-bit PWM Channels
6 PWM Channels with Programmable Resolution from 2 to 16 Bits
Output Compare Modulator
8-channel, 10-bit ADC
8 Single-ended Channels
7 Differential Channels
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
Byte-oriented Two-wire Serial Interface
Dual Programmable Serial USARTs
Master/Slave SPI Serial Interface
Programmable Watchdog Timer with On-chip Oscillator
On-chip Analog Comparator
Special Microcontroller Features
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby
Software Selectable Clock Frequency
ATmega103 Compatibility Mode Selected by a Fuse
Global Pull-up Disable
I/O and Packages
53 Programmable I/O Lines
64-lead TQFP and 64-pad QFN/MLF
Operating Voltages
2.7 - 5.5V ATmega128L
4.5 - 5.5V ATmega128
Speed Grades
0 - 8 MHz ATmega128L
0 - 16 MHz ATmega128
图1.ATmega128方框图
图2. WIZ200WEB外形图
WIZ200WEB provides the tiny embedded web server operating on low-speed MCU. It controls digital output or monitors digital and analogue input through web browser. The webpage is stored in the serial flash memory of the board, and can be updated through network.
WIZ200WEB 主要功能:
Operates as HTTP Server
Guarantee system stability and reliability by using W5300, the hardwired chip
Provides Configuration Tool Program for easy control and confiuration
Supports 10/100 Mbps Ethernet
RoHS Compliant
WIZ200WEB 主要特性:
Embedded Web Server module having Atmega128 & W5300
Operates as HTTP Server
Available of testing digital output (LED & LCD Control), digital input & analogue input through web browser
Guarantee system stability and reliability by using W5300, the hardwired TCP/IP chip
Provides Configuration Tool Program for easy configuration and control
Supports 10/100 Mbps Ethernet
RoHS Compliant
WIZ200WEB 指标:
图3.WIZ200WEB评估板方框图
图4.WIZ200WEB评估板电路图(1)
图5.WIZ200WEB评估板电路图(2)
