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  • 富士通16-Bit Interpolating DACMB86060
    http://www.ic72.com 发布时间:2013/4/26 15:59:39

     
        富士通的MB86060是一个高性能的12位,400 msa / s数模转换器(DAC)增强与一个16位的插值滤波前端。使用新型技术转换器结构提供了高速操作符合BiCMOS或双极设备但是在低功率的CMOS。

       
        The Fujitsu MB86060 is a high performance 12-bit, 400MSa/s Digital-to-Analog Converter (DAC) enhanced with a 16-bit interpolation filtering front-end. Use of novel techniques for the converter architecture delivers high speed operation consistent with BiCMOS or bipolar devices but at the low power of CMOS. Fujitsu’s proprietary architecture is the subject of several patent applications. Additional versatility is provided by selectable input interpolation filters, programmable dither and noise shaping facilities. Excellent SFDR performance coupled with high speed conversion rate and low power make this device particularly suitable for high performance communication systems, in particular direct IF synthesis applications.

       
        Features

       
        16-bit Interpolating Digital to Analog conversion x1, x2 or x4 interpolation filtering 100MSa/s input, with x4 interpolation enabled Programmable highpass filtered dither Selectable 2nd order noise shaping Versatile CMOS digital interface Internal programmable clock multiplier Low power, 3.3V operation (343mW @32MSa/s input, x4) Performance enhanced pinout with on-chip decoupling 0.35µm CMOS technology with Triple Well Industrial temperature range (-40°C to +85°C)

       
        Applications

       
        Direct IF Synthesis Cellular basestations Wide-band communications systems

       
        Functional Description

       
        The MB86060 integrates a 12-bit 400MSa/s DAC with selectable front end processing to provide input interpolation filtering, dither and noise shaping. Versatile interfacing via the 16-bit parallel CMOS data input allows different system requirements to be accommodated, with either offset binary or 2’s complement data formats selected by an input format control. The device is manufactured in a 0.35µm advanced CMOS process with Triple Well extension giving improved isolation between analog blocks and digital-analog.
     


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