Cirrus 公司的CS42L55是带H类耳机放大器的超低功耗立体声CODEC,采用多比特delta-sigma调制,ADC和DAC为低功耗手提系统应用提供了许多特性. CS42L55的DAC特性包括99dB的动态范围和-86dB的THD+N,立体声播放的功耗为5mW,立体声耳机和线路放大器采用H类放大器,能自动调整电源,具有高效率和低EMI,ADC特性包括95dB动态范围和-87dB的THD+N,立体声录音时的功耗为3.5mW,具有2:1立体声输入复接(MUX), CODEC系统采用12MHz USB主时钟输入和高性能的多比特delta-sigma架构,并集成了高效率的电源管理功能. CS42L55可广泛用于HDD和基于闪存的音频播放器,MD播放器, PDA, PMP,数码席相机,数码摄像机以及智能手机等.本文介绍了CS42L55的主要特性, 方框图, 典型应用连接框图, 模拟输入信号流程图和DSP引擎信号流程图以及CS42L55的评估板CDB42L55主要特性, 方框图和详细电路图.

CS42L55: Ultra-Low Power Stereo CODEC with Class H Headphone Amplifer
The CS42L55 is a highly integrated, 24-bit, ultra-low power stereo CODEC based on multi-bit delta-sigma modulation. Both the ADC and DAC offer many features suitable for low power portable system applications.

The analog input path allows independent channel control of a variety of features. The Programmable Gain Amplifier (PGA) provides analog gain with zero cross transitions. The ADC path includes a digital volume attenuator with soft ramp transitions and a programmable ALC and noise gate monitor the input signals and adjust the volume appropriately. An analog passthrough also exists, accommodating a lower noise, lower power analog in to analog out path to the headphone and line amplifiers, bypassing the ADC and DAC.

The DAC output path includes a fixed-function digital signal processing engine. Tone control provides bass and treble adjustment at four selectable corner frequencies.
The digital mixer provides independent volume control for both the ADC output and PCM input signal paths, as well as a master volume control. Digital volume controls may be configured to change on soft ramp transitions while the analog controls can be configured

to occur on every zero crossing. The DAC path also includes de-emphasis, limiting functions and a beep generator delivering tones selectable across a range of two full octaves.
The Class H stereo headphone amplifier combines the efficiency of an integrated step-down and inverting charge pump with the linearity and low EMI of a Class AB amplifier. A step-down/inverting charge pump operates in two modes: +/-VCP mode or +/-(VCP/2) mode. Based on the amplifier’s output signal, internal logic automatically
adjusts the output of the charge pump, +VHPFILT and –VHPFILT, to optimize efficiency. With these features, the amplifier delivers a ground-centered output with a large signal swing even at low voltages and eliminates the need for external DC-blocking capacitors.

These features make the CS42L55 the ideal solution for portable applications that require extremely low power consumption in a minimal amount of space.
The CS42L55 is available in a 36-pin QFN package for the Commercial (-40°C to +85°C) grade.

CS42L55主要特性:
DIGITAL to ANALOG FEATURES
5 mW Stereo Playback Power Consumption
99 dB Dynamic Range (A-wtd)
86 dB THD+N
Digital Signal Processing Engine
Bass & Treble Tone Control, De-Emphasis
Master Volume Control (+12 to -102 dB in 0.5 dB steps)
Soft-Ramp & Zero-Cross Transitions
Programmable Peak-Detect and Limiter
Beep Generator w/Full Tone Control
Stereo Headphone and Line Amplifiers
Step-Down/Inverting Charge Pump
Class H Amplifier - Automatic Supply Adj.
High Efficiency
Low EMI
Pseudo-Differential Ground-Centered Outputs
High HP Power Output at -75 dB THD+N
2 x 20 mW Into 32 @1.8 V
2 x 20 mW Into 16 @1.8 V
1 VRMS Line Output @1.8 V
Analog Vol. Ctl. (+12 to -55 dB in 1 dB steps)
Analog In to Analog Out Passthrough
Pop and Click Suppression
ANALOG to DIGITAL FEATURES
3.5 mW Stereo Record Power Consumption
95 dB Dynamic Range (A-wtd)
-87 dB THD+N
2:1 Stereo Input MUX
Analog Programmable Gain Amplifier (PGA) (+12 to -6 dB in 0.5 dB steps)
+20 dB Boost
Programmable Automatic Level Control (ALC)
Noise Gate for Noise Suppression
Programmable Threshold & Attack/Release Rates
Independent ADC Channel Control
Digital Vol. Ctl. (0 to -96 dB in 1 dB steps)
High-Pass Filter Disable for DC Measurements
Pseudo Differential Inputs
SYSTEM FEATURES
12 MHz USB Master Clock Input
Low Power Operation
Stereo Anlg. Passthrough: 3.3 mW @1.8 V
Stereo Rec. and Playback: 8.3 mW @1.8 V
Headphone Detect Input
SYSTEM FEATURES
High Performance 24-bit Converters
Multi-bit Delta Sigma Architecture
Integrated High Efficient Power Management
Reduces Power Consumption
Step-Down Charge Pump Improves Efficiency
Inverting Charge Pump Accommodates
Low System Voltage by Providing Negative Rail for HP/Line Amp
LDO Reg. Provides Low Digital Supply Voltage
Digital Power Reduction
Very Low Oversampling Rate for Converters
Bursted Serial Clock Providing 24 Bits per Sample
Power Down Management
ADC, DAC, CODEC, PGA, DSP
Analog & Digital Routing/Mixes
Line/Headphone Out = Analog In (ADC Bypassed)
Line/Headphone Out = ADC Out
Internal Digital Loopback
Mono Mixes
I²C® Control Port
I²S Digital Interface Format
Flexible Clocking Options
Master or Slave Operation
High-Impedance Digital Output Select (used for easy MUXing between CODEC
and other data sources)
8.000, 11.029, 12.000, 16.000, 22.059, 24.000, 32.000, 44.118 and 48.000 kHz
Sample Rates
CS42L55应用:
HDD & Flash-Based Portable Audio Players
MD Players/Recorders
PDAs
Personal Media Players
Portable Game Consoles
Digital Voice Recorders
Digital Camcorders
Digital Cameras
Smart Phones



图1. CS42L55方框图



图2.CS42L55典型连接框图



图3.CS42L55模拟输入信号流程图




图4.CS42L55 DSP 引擎信号流程图




图5.CS42L55模拟输出级

CS42L55评估板CDB42L55
Evaluation Board for CS42L55
The CDB42L55 is the ideal evaluation platform solution to test and evaluate the CS42L55.The CS42L55 is a highly integrated, 24-bit, ultra-low-power stereo CODEC based on multi-bit Delta-Sigma modulation suitable for low-power portable system
applications. Use of the board requires an analog or digital signal source, an analyzer, and power supplies. A Windows PC-compatible computer is also needed in order to
configure the CS42L55 and the board.

System timing can be provided by the CS8416 S/PDIF Receiver, by the CS42L55 supplied with a master clock, or via an I/O stake header with a DSP connected.

RCA connectors are provided for CS42L55 analog inputs and HP/Line outputs. A 1/8 inch audio jack is provided for headphone stereo out. Digital I/O connections are available via
RCA phono or optical connectors to the CS8416 and CS8406 (S/PDIF Rx and Tx).

The CDB42L55 is programmed via the PC’s USB using Cirrus Logic’s Microsoft® Windows®-based FlexGUI software. The evaluation board may also be configured to accept external timing and data signals for operation in a user application during system development.

CDB42L55主要特性:
Line-level Analog Inputs
4 RCA Input Jacks
Line-Level & HP Analog Output
Stereo Headphone Out Jack
RCA Audio Jacks for Headphone and Line Outputs
S/PDIF Interface
CS8416 Digital Audio Receiver
CS8406 Digital Audio Transmitter
I/O Stake Headers and SMA Connectors
External I²C™ Control Port Accessibility
External DSP Serial Audio I/O Accessibility
Direct DSP Serial Audio I/O accessibility with CS42L55 through SMA connectors
Multiple Power Supply options via USB, Battery or External Power Supplies
1.65 V to 3.3 V Logic Interface
FlexGUI S/W Control - Windows® Compatible
Pre-defined & User-configurable Scripts



图6. 评估板CDB42L55方框图
CDB42L55 SCHEMATICS



图7.评估板CDB42L55电路图(1)(CS42L55 和模拟I/O )



图8.评估板CDB42L55电路图(2)(S/PDIF和数字接口 )



图9.评估板CDB42L55电路图(3)(PLL,振荡器和外接I/O连接 )




图10.评估板CDB42L55电路图(4)(MCU和FPGA)




图11.评估板CDB42L55电路图(5)(电源 )