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  • IMEC发布32nm以下制程高质量超浅结制备技术
    http://www.ic72.com 发布时间:2009/6/18 9:21:14

        IMEC通过结合气相掺杂和亚溶激光退火,制造出具有突变掺杂分布的高质量无缺陷超浅结。该结果显示了使用气相掺杂取代传统光线技术对于实现32nm以下节点源漏延伸技术的优势。

        IMEC reports the fabrication of high-quality ultra-shallow junctions for sub-32nm CMOS devices

        IMEC has combined vapor phase doping and sub-melt laser annealing to fabricate high-quality, defect-free ultra-shallow junctions (USJs) with abrupt dopant profile. The results demonstrate the benefits of using vapor phase doping instead of classical beamline techniques to create the source and drain extension junctions of sub-32nm CMOS devices.

        In view of the need for alternative doping strategies for planar as well as non-planar devices, IMEC researchers have investigated the properties of USJs that were fabricated by the combination of vapor phase doping and sub-melt laser anneal. The vapor phase doping process comprised the deposition of boron or arsenic on 300mm Si wafers, using a reduced pressure chemical vapor deposition system. Activation and driving-in of the dopants were performed using a diode bar laser system with a laser wavelength of 808nm. The results were compared with those obtained by classical beamline ion implantation using similar laser anneal conditions.

        The results demonstrate the potential of the combined vapor phase doping and laser anneal technique as a replacement technology for classical beamline and annealing techniques for creating the source and drain extension junctions in sub-32nm CMOS technology. Such devices require sub-10nm junction depth, which interferes with the achievement of low enough sheet resistance. Indeed, using classical beamline techniques, implantation damage can degrade the junction’s quality. And for non-planar devices such as FinFETs, beamline ion implantation can not meet the requirement of doping conformality. With vapor phase doping and laser anneal, the aggressive scaling of the source and drain extension junctions for planar as well as non-planar devices has now come within reach. Sub-melt millisecond anneal is preferred over rapid thermal annealing since the latter results in excessive dopant diffusion and lower electrical activation.

        For boron vapor phase doping, the technique enables the achievement of high-quality USJs with abrupt dopant profile and high activation level. The as-deposited dopant profile is sharper than the profile obtained after ion implantation. After 3 laser anneal scans at 1300, a junction depth xj of ~12nm and an activation level of ~2.1x1020cm-3 were obtained, together with a sheet resistance Rs as low as ~600Ω/sq. Hence, for p-type vapor phase doping, the requirements for the 32 and 22nm technology nodes are fulfilled. The arsenic vapor phase doping wafers show a good junction profile and effective drive-in of the dopant atoms into Si. However, only a fraction of the arsenic dopants has become electrically active, and work is ongoing to understand and solve this issue.

        These results have been presented at the 6th International Conference onSilicon Epitaxy and Heterostructures, www.icsi-6.org.

        Figure Ultra shallow junctions.jpg: Sheet resistance (Rs) as function of junction depth (xj) for USJs fabricated by various techniques, compared to this work. The dashed lines denote the Rs(xj) functions for box-like dopant profiles with activation levels of 5x1019cm-3 and of 1x1020 cm-3. The Rs-xj regions aimed for the 32nm and the 22nm technology nodes are indicated as dashed-dotted boxes.


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