ADI 公司的ADSP-BF52xC系列嵌入式处理器集成了低功耗高质量立体声音频CODEC,以及可编程输入增益放大器(PGA)和单声道麦克风输入,两个24位ADC和两个24位DAC. ADSP-BF52xC系列的处理器是高达600MHz的高性能Blackfin处理器,采用RISC类寄存器和指令模型,容易编程并支持友好界面.片内集成了电压稳压器和123KB存储器,嵌入的音频CODEC具有立体声的24位ADC和DAC,DAC的SNR达100dB(A加重),THD达-80dB,而DAC的SNR达90dB(A加重),THD为-80dB.本文介绍了ADSP-BF52xC系列的处理艾特性和嵌入的CODEC特性, 方框图和CODEC方框图以及采用SPI和TWI控制的应用电路图.

Embedded Processor ADSP-BF522C/523C/524C/525C/526C/527C
The ADSP-BF522C/523C/524C/525C/526C/527C adds a low power, high quality stereo audio codec for portable digital audio applications with one set of stereo programmable gain amplifier (PGA) line inputs and one monaural microphone input. It features two 24-bit analog-to-digital converter (ADC) channels and two 24-bit digital-to-analog (DAC) converter channels.

The CODEC can operate as a master or a slave. It supports various master clock frequencies, including 12 MHz or 24 MHz for USB devices; standard 256 × fS or 384 × fS based rates, such as 12.288 MHz and 24.576 MHz; and many common audio sampling rates, such as 96 kHz, 88.2 kHz, 48 kHz, 44.1 kHz, 32 kHz, 24 kHz, 22.05 kHz, 16 kHz, 12 kHz, 11.025 kHz, and 8 kHz.

The CODEC can operate at power supplies as low as 1.8 V for the analog circuitry and as low as 1.8 V for the digital circuitry. The maximum voltage supply is 3.6 V for all supplies.
The CODEC software-programmable stereo output options provide the programmer with many application possibilities because the device can be used as a headphone driver or as a speaker driver. Its volume control functions provide a large range of gain control of the audio signal.

处理器特性:

Up to 600MHz high performance Blackfin processor

RISC-like register and instruction model for ease of programming and compiler-friendly support

Advanced debug, trace, and performance monitoring

Accepts a wide range of supply voltages for internal and I/O operations. See operating conditions in the published  DSP-BF522/ADSP-BF523/ADSP-BF524/ADSPBF525/ ADSP-BF526/ADSP-BF527 datasheet.

Programmable on-chip voltage regulator (ADSP-BF523/525/527 processors only)

Embedded low power audio CODEC

289-ball (12 mm x 12 mm) CSP_BGA package

132K bytes of on-chip memory

External memory controller with glueless support for SDRAM and asynchronous 8-bit and 16-bit memories

Flexible booting options from external flash, SPI and TWI memory or from host devices including SPI, TWI, and UART

Code Security with LockboxTM Secure Technology

One-Time-Programmable (OTP) Memory

Memory management unit providing memory protection

2 dual-channel memory DMA controllers

See the published ADSP-BF522/ADSP-BF523/ADSPBF524/

ADSP-BF525/ADSP-BF526/ADSP-BF527 datasheet for additional peripherals

嵌入CODEC特性:

Stereo, 24-bit ADCs and DACs

DAC SNR: 100 dB (A-weighted), THD: –80 dB at 48 kHz, 3.3 V

ADC SNR: 90 dB (A-weighted), THD: –80 dB at 48 kHz, 3.3 V

Highly efficient headphone amplifier

Stereo line input and monaural microphone input

Low power

7 mW stereo playback (1.8 V supply)

14 mW record and playback (1.8 V supply)

Low supply voltages

Analog: 1.8 V to 3.6 V

Digital core: 1.8 V min

Digital I/O: 1.8 V to 3.6 V

256 × fS /384 × fS oversampling rate in normal mode;

250 × fS/272 × fS oversampling rate in USB mode

Audio sampling rates: 8 kHz, 11.025 kHz, 12 kHz, 16 kHz, 22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, and 96 kHz



图1.ADSP-BF526C系列方框图



图2.ADSP-BF526C CODEC 方框图



图3.采用SPI控制的应用电路



图4.采用TWI控制的应用电路